Edge AI · TinyML · Built in Munich

From labeled folder to deployable edge model.

AutoEdgeAI is a local-first workbench for embedded computer vision and audio. Upload a ZIP of labeled data — it validates the dataset, trains with two-phase transfer learning, and hands back an int8-quantized TFLite model with a full model card. Validated on the STM32N6.

Book a pilot →

Your data stays on your machine. No ML team required.

autoedgeai · job 0042 · sample run

✓ dataset gears.zip · 2 classes · 500 images

✓ validation passed · split 70 / 15 / 15

→ phase 1/2 · warmup · epoch 10/10 · val_acc 0.60

→ phase 2/2 · fine-tune · epoch 14/14 · val_acc 0.87

✓ eval · test_acc 0.86 · confusion matrix ready

✓ export int8 + fp32 TFLite · labels.txt

✓ model_card.json written

Live log · streamed to your browser

INT8 + FP32

TFLite export

Task types today

18.2 ms

EfficientNet-B0 · STM32N6 NPU (est.)

0 lines

of ML code

01 /The Problem

Edge AI is stuck between two scarce experts.

Industrial teams are deep in embedded C — and thin on deep learning. The traditional path is broken and expensive.

The talent gap

Companies have thousands of excellent embedded C/C++ engineers — but very few deep-learning experts to hand the work to.

The hardware wall

Fitting AI onto a €5 MCU with a built-in NPU means wrangling architectures, int8 quantization, and unforgiving Flash, RAM and latency limits.

The junior-ML trap

Junior data scientists burn weeks forcing heavy nets like ResNet onto tiny chips — and still miss the memory or accuracy target.

02 /How it works

A workbench that runs the training grind for you.

Upload & validate

Drop a ZIP of labeled folders. AutoEdgeAI checks structure, class balance and sample counts before a single training minute is spent.

Train

Two-phase transfer learning — 10 frozen-backbone warmup epochs, then 14 fine-tuning epochs by default — with the training log streamed live to your browser.

Evaluate

Test accuracy, per-class precision and recall, a confusion matrix — plus a “Try the Model” panel to sanity-check it on real samples.

Export & deploy

int8 and float32 TFLite, labels.txt, and a model card with the full training trace. Firmware deploy validated on the STM32N6570-DK.

AutoEdgeAI training screen: live accuracy and loss curves next to the streamed training log, mid-way through a two-phase run — FIG 01 / Live training — accuracy & loss curves and the streamed log, mid-run

AutoEdgeAI diagnostics: confusion matrix and per-class precision and recall for a two-class gear dataset — FIG 02 / Evaluate — confusion matrix and per-class metrics on the held-out split

03 /The differentiator · auto-improve

It doesn’t stop at one model. It searches the frontier.

Kick off a campaign and the built-in advisor plans run after run — swapping backbones, input sizes and quantization — building a Pareto frontier of accuracy versus model size. The strategy is visible and tweakable, not a black box.

→The advisor reads each result and proposes the next run — architecture, input size, training config.

→Hardware-aware search: on the STM32N6 NPU tier the advisor steps EfficientNet-B0 → B1 against real ST Edge AI benchmarks. The wider backbone catalog — EfficientNet B0–B7 & V2, MobileNet V1–V3, ConvNeXt, ResNet, DenseNet and more — opens up on larger hardware tiers.

→Every candidate lands on the accuracy-vs-size frontier — you pick the trade-off that fits your chip.

AutoEdgeAI campaign screen: a completed auto-improve search with three candidates, best validation accuracy 87.0%, and a Pareto frontier of validation accuracy versus model size — FIG 03 / A real campaign on a 500-image gear dataset — EfficientNet-B0 baseline → advisor retrain → EfficientNet-B1, best validation 87.0%

04 /Where AutoEdgeAI fits

Local-first, transparent, built for tiny chips.

AutoEdgeAI (US)

NVIDIA TAO

Edge Impulse

Runs where

Local-first — your machine, your data never leaves

Your GPU infrastructure

Cloud platform (Studio)

Target hardware

Ultra-low-power MCUs — validated on the STM32N6 NPU

High-power GPUs / Jetson

Broad MCU / MPU catalog

Output

int8 + float32 TFLite, labels, model card with training trace

TensorRT engines

Firmware bundles / SDK

Model search

Advisor-driven Pareto search — visible & tweakable

Manual config, ML expertise needed

Platform-managed AutoML

05 /Demo · defect detection

From labeled photos to a model that catches defects.

A camera over metal gears — one good, one scratched. Train a defect-detection model in AutoEdgeAI, deploy the int8 export to an STM32N6 board, and watch it flag the bad part on-device.

The payoff

On-device, no cloud round-trip.

The exported int8 model runs directly on the NPU. Results in milliseconds, and production images never leave the line.

STATUS: DEFECT

int8 · on-device inference

AutoEdgeAI run results: 86.1% accuracy on the held-out test split of a 500-sample gear dataset, model EfficientNet-B1, verdict Strong, with training history charts and a deploy-firmware button — FIG 05 / The gear model after auto-improve — 86.1% on the held-out test split, ready for firmware deploy

06 /Who it’s for & how it ships

Give your embedded team ML superpowers.

Built for

The DACH “Mittelstand” — German, Swiss & Austrian industrial automation, manufacturing and robotics SMEs.

The user

Firmware team leads and embedded software engineers — no data scientist required.

Task types today

Image classification (accuracy) · image anomaly detection (AUROC — trained on normal samples only) · acoustic classification.

Deploy targets

Four hardware tiers modeled — STM32N6-class NPU boards and PC/server run today; plain MCUs (STM32H7, nRF52) and SBCs (Raspberry Pi, STM32MP2) are on the tier roadmap.

Local-first

Available today

Runs on your own machine — datasets and images never leave your network. This is the workflow pilot partners use today.

Hosted pilot / managed SaaS

Roadmap

A managed instance for teams that want zero setup. On the roadmap — pilot partners get early access.

AutoEdgeAI task picker: six task types — image classification, image anomaly detection and acoustic classification marked ready; object detection, time-series clustering and time-series anomaly detection marked preview — FIG 06 / The task picker — three task types trainable today, three more in preview

07 /Roadmap

Where this is going.

In development — not yet in the product

R1.

Object detection & time-series

Datasets and results screens exist in preview today; training lands next.

R2.

Hardware-in-the-loop

Flash the board automatically and measure real on-device latency and memory — not estimates.

R3.

CLI for scripted pipelines

Drive the whole dataset-to-model flow from CI or your own scripts.

R4.

LLM-powered advisor

Today’s advisor is rule-based and transparent; a language-model strategist is planned on top.

R5.

Managed SaaS

Multi-user hosting with accounts, shared datasets and campaign history.

R6.

More boards

STM32N6 is validated today; the modeled tiers for plain MCUs (STM32H7, nRF52) and SBCs (Raspberry Pi, STM32MP2) follow.

Now recruiting pilot partners

Put your dataset through it.

Bring a labeled dataset — we’ll run it end-to-end with you and hand back the quantized model, the metrics and the model card.

Book a pilot →